Integrated circuits are typically fabricated on semiconductor wafers, which are subsequently separated into individual dies and packaged as microchips, which are quality tested to assure satisfactory performance. Microchips that fail quality testing reduce yields and increase effective per microchip fabrication costs. Failure analysis may be performed in an effort to improve the fabrication process and increase yields, and testing during the fabrication process may facilitate failure analysis. However, testing time during fabrication also reduces overall yields.